Enum Csr 

#[repr(u32)]
pub enum Csr {
    Mstatus = 768,
    Misa = 769,
    Mie = 772,
    Mtvec = 773,
    Mscratch = 832,
    Mepc = 833,
    Mcause = 834,
    Mtval = 835,
    Mip = 836,
    Cycle = 3_072,
    Mvendorid = 3_857,
    PrintInt = 310,
    PrintHex = 311,
    PrintStr = 312,
    PrintChar = 313,
    ReadKbd = 320,
}

CSR addresses used by the emulator.

The standard machine-mode CSRs follow the RISC-V privileged spec. The Print* and ReadKbd entries (0x136–0x140) are custom debug extensions inherited from the original mini-rv32ima: they let bare-metal code print integers, hex values, strings, and characters without needing a UART driver.

Variants

Mstatus = 768

Machine status register.

Misa = 769

Machine ISA register (reports RV32IMA to the kernel).

Mie = 772

Machine interrupt-enable register.

Mtvec = 773

Machine trap-handler base address.

Mscratch = 832

Machine scratch register (used by trap handlers for context save).

Mepc = 833

Machine exception PC — address of the trapping instruction.

Mcause = 834

Machine cause register.

Mtval = 835

Machine trap value (faulting address or instruction).

Mip = 836

Machine interrupt-pending register.

Cycle = 3_072

Cycle counter (lower 32 bits).

Mvendorid = 3_857

Vendor ID (returns 0xff0ff0ff).

PrintInt = 310

Write a signed integer to stdout.

PrintHex = 311

Write a hex word to stdout.

PrintStr = 312

Write a null-terminated string from RAM to stdout.

PrintChar = 313

Write a single character to stdout.

ReadKbd = 320

Read one byte from stdin (-1 if none available).