Module emulator 

The emulator core — CPU execution loop, image loading, and run control.

Emulator is the central type. It owns the CpuState, the RAM buffer, and optional debug state (symbol table, output buffer). Everything else — time, keyboard, sleep — is delegated to a Platform implementation.

Execution flow

Emulator::run()
  └─ loop {
       tick_timer(elapsed_us)       // advance mtime, check MTIP
       check WFI / pending IRQ
       'iloop: for 0..count {
           fetch instruction
           decode opcode
           execute → update regs / pc / trap
       }
       commit_trap() if any trap fired
       update cycle counter
     }

Loading images

Method	Use case
Emulator::load_raw	Linux kernel raw image + DTB
Emulator::load_raw_from_bytes	Same, but from an in-memory slice (WASM)
Emulator::load_elf	Bare-metal ELF or FreeRTOS

ISA coverage

Extension	Instructions
RV32I	All base integer instructions
RV32M	MUL, MULH, MULHSU, MULHU, DIV, DIVU, REM, REMU
RV32A	LR.W, SC.W, AMOSWAP/ADD/XOR/AND/OR/MIN/MAX/MINU/MAXU.W
Zicsr	CSRRW, CSRRS, CSRRC, CSRRWI, CSRRSI, CSRRCI
Privileged	MRET, WFI, ECALL, EBREAK
FENCE	Treated as no-op (no cache model)

Structs

Emulator

A complete RV32IMA emulator instance.

RunConfig

Parameters that control the Emulator::run loop.

Constants

RAM_BASE

Physical base address of emulated RAM.